Servers in large data centers benefit from disaggregating storage resources from the computational nodes, such as the servers, to efficiently combine the storage resources into aggregated pools to be shared among the computational nodes. These pools enable higher density of servers in racks, and flexibility in how the storage resources are allocated to the computational nodes. Existing solutions to pool resources involve implementation of a Redundant Array of Independent Disks (RAID) across a collection of solid state storage devices (SSDs) and then allocation of a portion of the capacity to each attached computational node. The RAID abstraction requires node Input/Output (IO) commands to be processed by a RAID controller to create translated commands that can be sent to the SSDs. This translation by the RAID and SSD controllers add latency to I/O command processing. As the latency of SSDs reduces with new, high speed NVM technology, the added latency for RAID controller translations becomes a larger percentage of the overall I/O latency.
The NVM Express specification defines an optimized register interface, command set and feature set for PCI Express (PCIe®)-based Solid-State Drives (SSDs). The Peripheral Component Interconnect express (PCIe) bus reduces latency, provides improved Input/Output operations per second (IOPSs) and improves parallelism of SSD access. NVMe allows host software to communicate with storage subsystems in the flash memory devices.
NVMe provides for multi-path I/O that allows two or more independent PCIe paths between a single host and a namespace and provides for namespace sharing to allow two or more hosts to access a common shared namespace using different NVMe controllers. Both multi-path I/O and namespace sharing require that the NVMe subsystem contain two or more controllers. NVMe also supports Single Root I/O Virtualization (SR-IOV) that provides virtual functions to allow multiple virtual machines to access a storage device and bypass the virtual machine monitor or hypervisor layer for the I/O access.